The
PDP-11 was a series of
16-bit minicomputers sold
by
Digital Equipment
Corp. from 1970 into the 1990s. Though not explicitly conceived
as successor to DEC's
PDP-8 computer in the
PDP series of computers
(both product lines lived in parallel for more than 10 years), the
PDP-11 replaced the PDP-8 in many
real-time applications. It had several
uniquely innovative features, and was easier to program than its
predecessors with its use of general registers. It was replaced in
the mid-range minicomputer niche by the
VAX-11
32-bit extension of the PDP-11.
Smaller
personal computers such as
the
IBM PC, and workstations and servers by
vendors such as
Sun Microsystems
became popular based on standard microprocessors such as the
Intel x86 and
Motorola
68000, As a PDP-11 based personal computer offering failed in
the marketplace, these computers using standard operating systems
such as
MS-DOS and
Unix
would eventually evolve up to full 32 bit memory addressing, and
replace most proprietary minicomputer and midrange computers
including the VAX-11.
Design features of the PDP-11 and its operating systems influenced
the design of microprocessors such as the 68000, CP/M and DOS which
are still common in current computers and operating systems. The
first officially named version of Unix ran on the PDP-11/20 in
1970. The
C programming
language was written to take advantage of PDP-11 programming
features such as
byte addressing to
rewrite Unix in a high level language.
Unique features of the PDP-11 Series
Orthogonality
The PDP-11 instruction set was mostly
orthogonal. For example, instead
of instructions such as Load and Store, the PDP-11 had a Move
instruction for which either operand (source and destination) could
be memory or register. There were no Input or Output instructions;
each device responded to a memory location and so the same Move was
used instead; orthogonality would even let you move data directly
from an input device to an output device. More complex instructions
such as Add likewise adapted to having memory, register, input, or
output as source or destination. (These days, a
development environment
could give a programmer the illusion of orthogonality on any
machine; but at that time programmers occasionally needed to
understand the operation of the hardware.)
Generally, any operand could apply any of eight addressing modes to
eight registers. The addressing modes provided register, immediate,
absolute, relative, deferred (indirect), and indexed addressing,
and could specify autoincrementation and autodecrementation of a
register. (Whether such adjustment is by 1 or by 2 is the most
complex rule of the language, but totally regular and sensible in
every case.) Use of relative addressing let a machine-language
program be
position-independent.
For these reasons, PDP-11 programmers viewed the assembly language
as easy to learn and uniquely elegant.
The article on
PDP-11
architecture provides technical details on the
addressing modes and
instruction
set.
No dedicated I/O bus
In the most radical departure from earlier computers, the initial
models of the PDP-11 had no dedicated
bus for
input/output; it had only a memory bus called
the
Unibus. All input and output devices were
mapped to memory addresses, so no
special I/O instructions were needed.
An input/output device determined the memory addresses to which it
would respond and the interrupt priority it would request, and
specified its own interrupt vector. This loose framework provided
by the processor architecture made it unusually easy to invent new
bus devices, including devices to control hardware that had not
been contemplated when the processor was designed.
Higher-performance members of the PDP-11 family, starting with the
PDP-11/45, departed from the single bus
approach. Instead, memory was interfaced by dedicated circuitry and
space in the
CPU cabinet,
while the
Unibus continued to be used for I/O
only. In the PDP-11/70 this was taken a step further, with the
addition of a dedicated interface from disks and tapes, via the
Massbus to memory. Use of different buses
was not visible to the programmer, however, and the orthogonality
of the assembly language was preserved.
Interrupts
The PDP-11 supported hardware
interrupts
at four priority levels. Interrupts were serviced by software
service routines, which could specify whether they themselves could
be interrupted (achieving interrupt
nesting). The event that caused the
interrupt was indicated by the device itself, as it informed the
processor of the address of its own service routine.
The article on
PDP-11
architecture provides more details on interrupts.
Designed for mass production
Finally, the PDP-11 was designed to be produced in a factory by
semiskilled labor. All of the dimensions of its pieces were
relatively non-critical. It used a
wire-wrapped backplane.
That is, the
printed circuit
boards plugged into a backplane connector. The backplane
connectors had square pins that could be connected to by wrapping
wires around them. The corners of the pins would bite into the wire
to form a gas-tight (i.e. corrosion-proof, therefore reliable)
connection.
The LSI-11
Q-Bus board with LSI-11/2 CPU
DEC "Jaws-11" (J11) Chipset
DEC "Fonz-11" (F11) Chipset
The LSI-11 (PDP-11/03) was the first PDP-11 model produced using
large-scale integration; the
entire CPU was contained on 4
LSI chips made by
Western Digital (the
MCP-1600 chip set). It used a bus which was a close
variant of the Unibus called the
Q-Bus; it
differed from the Unibus primarily in that addresses and data were
multiplexed onto a shared set of wires, as opposed to having
separate sets of wires, as in the Unibus. It also differed slightly
in how it addressed I/O devices and it eventually allowed a 22-bit
physical address (whereas the Unibus only allowed an 18-bit
physical address) and block-mode operations for significantly
improved bandwidth (which the Unibus did not support).
The CPU's
microcode includes a
debugger: firmware with a direct serial interface
(
RS-232 or
current
loop) to a
terminal. This let
the operator do
debugging by typing and
reading
octal numbers, rather than operating
switches and reading lights, the typical debugging method at the
time. The operator could thus examine and modify the computer's
registers, memory, and input/output devices, diagnosing and
correcting failures in software and peripherals except a failure
that disabled the microcode itself. On a failure that kept the
LSI-11 from
booting, the operator could
command it to boot from a different disk.
Both innovations increased the reliability and decreased the cost
of the LSI-11.
Later Q-Bus based systems such as the LSI-11/23, /73, and /83 were
based upon chip sets designed in house by Digital Equipment
Corporation. Later PDP-11 Unibus systems were designed to use
similar Q-Bus processor cards, sometimes with a special memory bus
for improved speed, using a Unibus adapter to support existing
Unibus
peripherals.
There were significant other innovations in the Q-Bus lineup. A
system variant of the PDP-11/03 introduced full system
Power-On Self-Test (POST) and the 11/83
introduced a primitive (by today's standards) anticipatory CPU
cache pre-load as well as a high-speed private memory interconnect
(bus).
The chip set was not restricted to implementing a PDP-11; a
published book gives the complete source listing of microcode that
instead implements the
APL
programming language.
The decline of the PDP-11
The basic design of the PDP-11 was sound and was continually
updated to use newer technologies. However, in the 1980s,
inexpensive
VLSI memory chips made large amounts of memory
affordable and the PDP-11's 16-bit limit on
logical addresses proved
insurmountable.
The article on
PDP-11 architecture
describes the hardware and software techniques used to work around
this limitation.
DEC's successor to the PDP-11, the
VAX (for
"Virtual Address Extension") overcame the 16-bit limitation, but
was initially a
superminicomputer
aimed at the high-end
time-sharing
market. The early VAXes provided a PDP-11 compatibility mode under
which much existing software could be immediately used.
Microprocessor chips such as the
Motorola 68000 and
Intel 80386 began to support 32-bit logical
addresses as well. The eventual mass-production of those chips
eliminated any cost advantage for the 16-bit PDP-11. A line of
personal computers based on the PDP-11, the
DEC Professional series, failed
commercially, along with other non-PDP-11 PC offerings from
DEC.
DEC discontinued PDP-11 production in 1997, and sold the PDP-11
design and system software rights to Mentec, Inc., an Irish
producer of LSI-11 based boards for Q-Bus and ISA architecture
personal computers. For several years, Mentec produced new PDP-11
processors.
By the late 1990s, not only DEC but most of the New England
computer industry which had been built around minicomputers similar
to the PDP-11 collapsed in the face of microcomputer-based
workstations and servers.
PDP-11 models
The PDP-11 processors tended to fall into several natural groups
depending on the original design upon which they are based and
which I/O bus they used. Within each group, most models were
offered in two versions, one intended for
OEMs and one intended for
end-users.
Unibus models
PDP-11/70 Front Panel
PDP-11/70, running
PDP-11/84
The following models used the
Unibus as their
principal bus:
- PDP-11 (later renamed the PDP-11/20) and PDP-11/15 — The original, non-microprogrammed
processor; designed by Jim O'Loughlin.
- PDP-11/35 and 11/40 — A microprogrammed successor to the /20; the
design team was led by Jim O'Loughlin.
- PDP-11/45, 11/50,
and 11/55 — A much faster microprogrammed
processor that could use semiconductor memory instead of or in
addition to core memory.
- PDP-11/70 — The 11/45 architecture expanded to allow 4 MB of physical memory segregated onto a private
memory bus, 2 KB of cache memory, and much faster
I/O devices connected via the Massbus.
- PDP-11/05 and 11/10 — A cost-reduced successor to the 11/20.
- PDP-11/34 and 11/04 — Cost-reduced follow-on products to the 11/35
and 11/05. The PDP-11/09 and 11/39 model names were documented
internally to DEC but never produced for sale. The PDP-11/34
concept was created by Bob Armstrong.
- PDP-11/44 — An extension of the 11/34
that included the cache memory as a
standard feature and optional floating
point unit. This machine also included a sophisticated serial
console and support for 4 MB of physical memory. The design team
was managed by John Sofio. NOTE: DEC documentation (PDP-11/44
System User's Guide, EK-11044-UG-003) shows the floating point unit
as an option (FPP-11F). Moreover, others have documented the 11/44
as a descendent of the 11/45 and 11/70; the 11/34 was of a
different 'lineage', following the 11/05.
- PDP-11/60 — A PDP-11 with
user-writable microcontrol store; this was designed by another team
led by Jim O'Loughlin.
- PDP-11/24 — First VLSI PDP-11 for
Unibus, using the "Fonz-11" (F11) chip set
- PDP-11/84 — Using the VLSI "Jaws-11"
(J11) chip set
- PDP-11/94 — J11-based, faster than
11/84
Q-bus models
LSI-11/23, cover removed
The following models used the
Q-Bus as their
principal bus:
- PDP-11/23 — 2nd generation of LSI
(F-11), early units only supported 248 KB memory, but could be
modified for 4 MB support
- PDP-11/23+/MicroPDP-11/23 — Improved
11/23 with more functions on processor card (physically a quad-size
card rather than dual)
- MicroPDP-11/73 — The third generation
LSI PDP, this system used the "Jaws-11" (J-11) chip set.
- Mentec M100 — Mentec redesign of the
11/93, with J-11 chipset at 19.66 MHz, 4 onboard serial ports,
1-4 MB on-board memory, and optional FPU.
- Mentec M11 —
processor upgrade board; last microcode implementation of PDP-11
instruction set by Mentec, using the TI 8832 ALU and TI 8818
microsequencer from Texas Instruments
Models without standard bus
PDT-11/150
- PDT-11/110
- PDT-11/130
- PDT-11/150
The PDT series were desktop systems marketed as "smart terminals".
The /110 and /130 were housed in a
VT100
terminal enclosure. The /150 was housed in a table-top unit which
included two 8" floppy drives, 3 asynchronous serial ports, 1
printer port, 1 modem port and 1 synchronous serial port and
required an external terminal. All three employed the same chipset
as used on the LSI-11/03 and LSI-11/2 in four "microm"s. There was
an option which combined two of the microms into one dual carrier,
freeing one socket for an EIS/FIS chip. The /150 in combination
with a
VT-105 terminal was also sold as
MiniMINC, a budget version of the
MINC-11.
The
DEC Professional
series were desktop PCs intended to compete with IBM's earlier 8088
and 80286 based personal computers. The models were equipped with
5 1/4" floppy disk drives and hard disks, except the 325 which
had no hard disk. The original operating system was P/OS, which was
essentially
RSX-11M+ with a menu system on
top. As the design was intended to avoid software exchange with
existing PDP-11 models, their ill fate in the market was no
surprise for anyone except DEC.
RT-11 was
eventually ported to the PRO series. A port to the PRO for
RSTS/E was also done internal to DEC, but was not
released. The PRO-325 and -350 units were based on the DCF-11
("Fonz") chipset, the same as found in the 11/23, 11/23+ and 11/24.
The PRO-380 was based on the DCJ-11 ("Jaws") chipset, the same as
found in the 11/53,73,83 and others, though running only at
10 MHz because of limitations in the support chipset.
Models that were planned but never introduced
- PDP-11/27 — A Jaws-11 implementation
that would have used the VAXBI Bus as its
principal I/O bus.
- PDP-11/68 — A follow-on to the
PDP-11/60 that would have supported 4 MB of
physical memory.
- PDP-11/74 — A PDP-11/70 that was
extended to contain multiprocessing features. Up to four processors
could be interconnected, although the physical cable management
became unwieldy. Another variation on the 11/74 contained both the
multiprocessing features and the Commercial Instruction Set. A
substantial number of prototype 11/74's (of various types) were
built and at least two multiprocessor systems were sent to
customers for beta testing, but no systems were ever officially
sold. A four processor system was maintained by the RSX-11
operating system development team for testing and a uniprocessor system served PDP-11 engineering
for general purpose timesharing. The 11/74 was due to be introduced
around the same time as the announcement of the new 32 bit product
line and the first model - the VAX 11/780. Rumour/Legend or
conspiracy theory held that the reason the 11/74 was
cancelled was due to its higher performance compared to the 11/780
(see, for example [4022]). Marketing was therefore concerned that
the availability of a higher performing PDP-11 would slow migration
to the new VAX. This was not the case. Rather, the ability to
maintain the product in the field was the issue. However conspiracy
or not, DEC was never able to successfully migrate its entire
PDP-11 customer base to the VAX. The primary reason was not
performance, but the PDP-11's superior real-time
responsiveness.
Special purpose versions
rt
MINC-23
- GT40 — VT11 vector graphic
terminal using a PDP-11/05
- GT42 — VT11 vector graphic terminal using a PDP-11/10
- GT44 — VT11 vector graphic terminal using a
PDP-11/40
- GT62 — VS60 vector graphic workstation using a PDP-11/34a
- H-11 — Heathkit OEM version of the LSI-11/03
- VT20 — Terminal with PDP-11/05 with direct mapped character
display for text editing and typesetting (predecessor of the
VT71)
- VT71 — Terminal with LSI-11/03 and QBUS backplane with direct
mapped character display for text editing and typesetting
- VT103 — VT100 with backplane to host an
LSI-11
- VT173 — A high-end typseset terminal containing an 11/03
- MINC-11 — Laboratory system based on
11/03 or 11/23; when based on the 11/23, it was sold as a
'MINC-23', but many MINC-11 machines were field-upgraded with the
11/23 processor. Early versions of the MINC-specific software
package would not run on the 11/23 processor because of subtle
changes in the instruction set; MINC 1.2 is documented as
compatible with the later processor.
- C.mmp — Multiprocessor
system from Carnegie Mellon University
- SBC 11/21 (boardname KXT11) Falcon and Falcon Plus — single
board computer on a Qbus card implementing the basic PDP11
instruction set, based on T11 chipset containing 32KB static RAM, 2
ROM sockets, 3 serial lines, 20 bits parallel I/O, 3 interval
timers and a 2-channel DMA controller. Up to 14 Falcons could be
placed into one Qbus system.
Unauthorized clones
The PDP-11 was sufficiently popular that many unauthorized
PDP-11-compatible minicomputers and microcomputers were produced in
Eastern Bloc countries. At least some
of these were pin-compatible with DEC's PDP-11s and could share
peripherals and system software. These include:
Operating systems
Several
operating systems were
available for the PDP-11
From Digital
From third parties
See also
Notes
References
Further reading
- Michael Singer, PDP-11. Assembler Language
Programming and Machine Organization, John Wiley & Sons,
NY: 1980.
External links
- The PDP-11 FAQ
- Preserving the
PDP-11 Series of 16-bit minicomputers
- Gordon Bell and Bill Strecker's 1975
paper, What We Learned From the PDP-11
- Further papers and links on Gordon Bell's site.
- The Fuzzball
- On LSI-11, RT-11, Megabytes of Memory and Modula-2/VRS
by Günter Dotzel, ModulaWare.com - An article on Modula-2
compiler/linker synergy to overcome the PDP/LSI-11 address space
limitations, published in DEC PROFESSIONAL, The Magazine for DEC
Users, Professional Press, Spring House, PA. U.S.A., January
1986.
- Programming the PDP-11/10. A video from DePauw
University demonstrating how to program a PDP-11/10.
- pdp11.co.uk
Site focused the preservation and restoration of PDP-11
computers
- electronica-60.ucoz.com Site focused the russian
version of PDP-11 computers
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